1 DPNC Yannick FAVRE Electronics Highlights 2011

2 14/12/2011 2011 Electronics Highlights2 Electronics group  3 Engineers  Daniel La Marra  Stéphane Débieux  Yannick Favre  2 technical assistants  Gabriel Pelleriti  Javier Mesa

3 ABCn-130 chip : Analog Binary Chip  Context : ATLAS Upgrade, Semi-Conductor Tracker detector (SCT) Collaborative team for improvement of the Frond-End chip Verilog programming (Hardware language similar to VHDL) Planned submission to chip foundry : end of 2012 Installed chips : 350,000 (> 2020 integration) Digital blocs development : Daniel La Marra (2011-2012) 14/12/2011 2011 Electronics Highlights3

4 14/12/2011 2011 Electronics Highlights4 ABCn-130 : Main improvements ABCn-250New ABCn-130 Technology:250nm130nm # channels:128256 Data rate:40 Mbit/s80 Mbit/s Data flow :VariableFixed (data rate increase) TX Chain (chip to chip) Hardware token signalSoftware Xon/Xoff (more flexibility) Single Event Upset Protection noneConfiguration choice : - Watchdog or - 3X Flip Flop + vote or - Hamming code # buffer levels:12 (L0 & L1 triggers)

5 ABCn-130 : Front-End bonding 14/12/2011 2011 Electronics Highlights5 Challenge for bonding 200  m 100  m 1100  m CHIP CORE

6 DBB : Digitizer & Buffer Board  Context : MICE experiment (RAL/UK) Electron Muon Ranger detector (EMR) Part of a collaborative team with the Front End Board Board & FPGA design + test : Stéphane Débieux 14/12/2011 2011 Electronics Highlights6 Mice experiment EMR

7 DBB : Main characteristics 14/12/2011 2011 Electronics Highlights7 Characteristics :  64 channels sampling from Front-End Board (FEB) at 400 MHz  Event data storage and transmission upon request from DAQ over gigabit link  Implementation of a set of commands according to a simple communication protocol  6 daisy-chained DBBs  Total of 8x6=48 FEB-DBB assemblies DBB FEB 64-ch PMT

8 DBB : Overview 14/12/2011 2011 Electronics Highlights8 2 Gigabit transceivers Altera Stratix II FPGA Power Supply : 3 DC/DC LVDS Connections to FEB Connectors for DBBs daisy-chain DAQ SMA Connectors DIP switch for Board ID Connector for FPGA programming

9 DBB : Test setup 14/12/2011 2011 Electronics Highlights9 PC Software for DAQ configuration FEB signals simulation board (D.LaMarra testbench on Altera FPGA) DAQ system on VME crate DBB with DAQ Gigabit connections to VME

10 DBB : Current status 14/12/2011 2011 Electronics Highlights10  Integrated in the detector with 6 layers at Geneva  Tested with positive results in June at RAL  Need further investigation and tests in laboratory to evaluate possible improvements both hardware and firmware  Planning for volume production required : target May 2012